Signal drivers for applying a signal to a signal line are in common use in electronic devices, such as integrated circuits. For example, a memory device may employ a variety of signal drivers to apply signals to a variety of circuits. One such signal driver may be used to apply voltages to word lines in an array of memory cells. The word lines may extend through a memory cell array from a set of global word line drivers. The global word line driver may selectively actuate each of the word lines responsive to the memory device receiving a row address corresponding to the word line. Each of the memory cells in the row corresponding to the received row address then applies stored data to a respective sense amplifier.
Each of the word lines extending through the array may be relatively long and, as a result, may have substantial capacitance. Furthermore, the word lines may be fabricated of polysilicon, which may have a relatively high resistance. The combination of the relatively high capacitance and relatively high resistance of the word lines may make it difficult for the global word line driver to quickly switch signal levels on the word lines, particularly in portions of the memory cell array that are more distant from the global word line driver. To alleviate this problem, it is conventional for memory cell arrays to be divided into smaller memory cell arrays, and to fabricate local word line drivers between at least some of these smaller memory cell arrays. The local word line drivers may receive substantially the same signals that are used to control the global word line drivers to drive the word lines so that they may apply the same levels to the word lines that the global word line driver applies to the word lines.
Although the use of local word line drivers may improve the switching speed of word lines, prior art designs generally include both at least one PMOS transistor and at least one NMOS transistor in each local word line driver. Also, access transistors coupled to the word lines and used to couple the memory cells in the arrays to the digit lines are often NMOS transistors formed in a p-type substrate. The NMOS transistors in the local word line drivers may also be fabricated in the same p-type substrate. However, fabricating the PMOS transistors in the local word drivers may require the fabrication of an n-well in the p-type substrate to provide n-type material in which the PMOS transistors may be fabricated. Yet forming a n-well for each of the local word line drivers can greatly increase the area of a semiconductor substrate required to fabricate the local word line drivers, thereby potentially either increasing the cost or reducing the capacity of memory devices using local word line drivers